Uso de RTOS
OS_CPU.H
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1 
7 /*
8 *********************************************************************************************************
9 * uC/OS-II
10 * The Real-Time Kernel
11 *
12 * (c) Copyright 2002, Nathan Brown, Longview, TX
13 * http://www.sputnickonline.com/
14 * All Rights Reserved
15 *
16 * PIC18xxxx Specific Code
17 * V1.00 - October 27, 2002
18 *
19 * File : OS_CPU.H
20 * By : Nathan Brown
21 *********************************************************************************************************
22 */
23 
24 // Interrupt handling - define in user code.
25 void CPUInterruptHook(void);
26 
27 
28 #define OS_STK_GROWTH 0
30 /*
31 *********************************************************************************************************
32 * DATA TYPES
33 * (Compiler Specific)
34 *********************************************************************************************************
35 */
36 
37 typedef unsigned char BOOLEAN;
38 typedef unsigned char INT8U;
39 typedef signed char INT8S;
40 typedef unsigned int INT16U;
41 typedef signed int INT16S;
42 typedef unsigned long INT32U;
43 typedef signed long INT32S;
44 typedef float FP32;
45 typedef double FP64;
47 /* Microchip PIC18xxx specific */
48 typedef signed short long INT24S;
49 typedef unsigned short long INT24U;
50 /* End Microchip PIC18xxx specific */
51 
52 typedef INT8U OS_STK;
53 typedef INT8U OS_CPU_SR;
55 #define BYTE INT8S
56 #define UBYTE INT8U
57 #define WORD INT16S
58 #define UWORD INT16U
59 #define LONG INT32S
60 #define ULONG INT32U
63 /*
64 **********************************************************************************************************
65 * MACROS FOR BYTE AND WORD SELECTION
66 *
67 * Needed for some of the OS specific funcions as the stack width and the address widths are different.
68 **********************************************************************************************************
69 */
70 
71 #define LOWORD(l) ((INT16U)(l))
72 #define HIWORD(l) (INT16U) *( ( (INT16U*) &((INT32U)(w)) ) + 1 )
73 #define LOBYTE(w) ((INT8U)(w))
74 #define HIBYTE(w) (INT8U) *( ( (INT8U*) &((INT16U)(w)) ) + 1 )
78 /*
79 *********************************************************************************************************
80 * CRITICAL SECTION CONTROL
81 *
82 * Method #1: Disable/Enable interrupts using simple instructions. After critical section, interrupts
83 * will be enabled even if they were disabled before entering the critical section.
84 *
85 * Method #2: Disable/Enable interrupts by preserving the state of interrupts. In other words, if
86 * interrupts were disabled before entering the critical section, they will be disabled when
87 * leaving the critical section.
88 * Not supported on a PIC18xxx
89 *
90 * Method #3: Disable/Enable interrupts by saving the value of the PSW into a local variable. After
91 * the critical section the variable can then be used to restore the PSW.
92 *********************************************************************************************************
93 */
94 #define OS_CRITICAL_METHOD 3
96 #if OS_CRITICAL_METHOD == 1
97 #define OS_ENTER_CRITICAL() INTCONbits.GIEH = 0
98 #define OS_EXIT_CRITICAL() INTCONbits.GIEH = 1
99 #endif
100 
101 /* Not supported
102 #if OS_CRITICAL_METHOD == 2
103 #define OS_ENTER_CRITICAL()
104 #define OS_EXIT_CRITICAL()
105 #endif
106 */
107 
108 #if OS_CRITICAL_METHOD == 3
109 #define OS_ENTER_CRITICAL() \
110  cpu_sr = 0; \
111  if(INTCONbits.GIEH){cpu_sr = 1;}\
112  INTCONbits.GIEH = 0
113 
114 #define OS_EXIT_CRITICAL() \
115  if(cpu_sr) INTCONbits.GIEH = 1
116 #endif
117 
118 
129 void OSCtxSw(void);
130 
131 #define OS_TASK_SW() OSCtxSw()
133 /* end */
unsigned char INT8U
Definition: OS_CPU.H:38
void CPUInterruptHook(void)
INTERRUPT SERVICE ROUTINE HOOK.
Definition: VECTORS.C:42
signed int INT16S
Definition: OS_CPU.H:41
signed short long INT24S
Definition: OS_CPU.H:48
INT8U OS_STK
Definition: OS_CPU.H:52
double FP64
Definition: OS_CPU.H:45
unsigned short long INT24U
Definition: OS_CPU.H:49
void OSCtxSw(void)
Switch the context by calling the function directly, since there are no software interrupts in a PIC1...
Definition: OS_CPU_C.C:495
float FP32
Definition: OS_CPU.H:44
unsigned char BOOLEAN
Definition: OS_CPU.H:37
unsigned long INT32U
Definition: OS_CPU.H:42
INT8U OS_CPU_SR
Definition: OS_CPU.H:53
signed long INT32S
Definition: OS_CPU.H:43
signed char INT8S
Definition: OS_CPU.H:39
unsigned int INT16U
Definition: OS_CPU.H:40